Low-Power High-Level Synthesis for Nanoscale CMOS Circuits

Publisher : Springer Science & Business Media

ISBN-13 : 0387764747

Page : 302 pages

Rating : 4.5/5 from 747 voters

This self-contained book addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits. The material deals primarily with high-level (architectural or behavioral) energy dissipation.

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ABSTRACT: Aggressive scaling of nanoscale CMOS integrated circuits has created significant design challenges arising from increasing power densities, thermal co